Nvidia has begun using its own Vera central processing units to run next-generation chip design software, aiming to reduce development time for future graphics processors.
The announcement came at the 2026 Design Automation Conference in Long Beach, where Nvidia revealed partnerships with Cadence Systems and Synopsys. Both firms have optimized their electronic design automation platforms for Vera CPUs. Cadence’s Jasper formal verification platform and Synopsys’ VCS logical simulation software now perform 1.5 times faster on Nvidia’s hardware.
AI agents take on chip design tasks
Nvidia is also embedding its PhysicsNeMo physics-AI libraries and GPU math libraries into the Nvidia Agent Toolkit. This integration lets autonomous AI agents manage more of the chip design process. Agents can now access accelerated solvers the same way engineers use third-party tools.
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The change may shorten a process that typically takes years. Chip design requires thousands of iterations to validate behavior, spot flaws, and refine blueprints before fabrication. While GPUs and AI have helped in some areas, many electronic design automation tasks still depend on CPU performance for logic simulation, formal verification, and digital implementation.
Vera CPUs were designed specifically for these workloads. Early tests show they can improve performance of two of the most demanding parts of the early design cycle by 1.5 times. Nvidia will collaborate with Cadence and Synopsys to expand these optimizations across the electronic design automation workflow, focusing on accelerating development of its next-generation Rosa CPU, which will use the Rigel core architecture.
New libraries expand GPU acceleration
Nvidia also rolled out updates to its CUDA-X libraries, including first-time support for iterative sparse solvers on GPUs. These solvers manage the sparse linear algebra used in physical modeling.
The software is free under the Apache 2.0 license but only runs on Nvidia hardware. The company believes this approach makes sense, as wider adoption of PhysicsNeMo and CUDA-X increases reliance on its silicon.
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The industry has long sought faster design cycles, but modern semiconductor complexity means even small improvements take years to realize. For now, Nvidia is wagering that combining its CPUs with AI agents will provide an advantage in a field where each month of development can mean millions in revenue.
No production timeline was given for the Rosa CPU, but the focus on automating design suggests Nvidia views the schedule as a key competitive factor.
While the approach may not immediately cut the time between chip generations, it reflects broader efforts to streamline development. The company’s investments in hardware and software integration could reshape how future processors are built.
